vistaでquartus その16

6474 ワード
quartus Polyphony FPGA FizzBuzz FizzBuzz テキストリンク

概要

vistaでquartusやってみた。
polyphonyでserialしてみた。
fizzbuzzやってみた。

環境

windows vista 32bit
quartus ii v13.0
polyphony v0.3.6
ep2c5t144ボード

写真

サンプルコード

from polyphony import testbench, module, is_worker_running
from polyphony.timing import clksleep
from polyphony.io import Port
from polyphony.typing import bit, uint8, bit8, int8

@module
class fizzbuzz:
    def __init__(self):
        self.data = Port(uint8, 'out', init = 0)
        self.start = Port(bit, 'out', init = 0)
        self.append_worker(self.worker)
    def _wait(self):
        for i in range(100000):
            pass
    def worker(self):
        i:uint8 = 1
        j:uint8 = 1
        k:uint8 = 0
        s:uint8 = 1
        l:uint8 = 1
        m:uint8 = 1
        while is_worker_running():
            if (j > 9):
                j = 1
                k = k + 1
            else:
                j = j + 1
            if (i < 101):
                s = i % 15
                l = i % 5
                m = i % 3
                if (s == 0):
                    self.data('f');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('i');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('b');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('u');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data(' ');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                elif (l == 0):
                    self.data('b');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('u');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data(' ');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                elif (m == 0):
                    self.data('f');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('i');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data('z');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                    self.data(' ');
                    self.start(1)
                    clksleep(1)
                    self.start(0)
                    self._wait()
                else:
                    if (i > 9):
                        self.data(k + 48);
                        self.start(1)
                        clksleep(1)
                        self.start(0)
                        self._wait()
                        self.data((i % 10) + 48);
                        self.start(1)
                        clksleep(1)
                        self.start(0)
                        self._wait()
                        self.data(' ');
                        self.start(1)
                        clksleep(1)
                        self.start(0)
                        self._wait()
                    else:
                        self.data((i % 10) + 48);
                        self.start(1)
                        clksleep(1)
                        self.start(0)
                        self._wait()
                        self.data(' ');
                        self.start(1)
                        clksleep(1)
                        self.start(0)
                        self._wait()
                i = i + 1

m = fizzbuzz()

verilogコード

module test2(input clk, input rst, output tx);
    wire [7:0] data;
    wire start;
    tx2 tx2(.clk(clk), .rst(rst), .start(start), .data(data), .tx(tx), .busy(busy), .get(get));
    fizzbuzz_m m(.clk(clk), .rst(rst), .data(data), .start(start));
endmodule

以上。