vistaでquartus その6

5382 ワード
quartus serial FPGA FizzBuzz FizzBuzz テキストリンク

概要

vistaでquartusやってみた。
fizzbuzzやってみた。
wait、入れてみた。

環境

windows vista 32bit
quartus ii v13.0
ep2c5t144ボード

写真

サンプルコード

module test1(input clk, input rst, output tx);
    localparam NEXT = 4'b0000;
    localparam DONE = 4'b1111;
    localparam WAIT = 4'b1110;
    reg [1:0] mod3;
    reg [2:0] mod5;
    reg [7:0] char;
    reg [3:0] state = NEXT;
    reg [3:0] p_state;
    reg [3:0] dg2 = 0,
        dg1 = 0,
        dg0 = 0;
    reg send = 0;
    reg [23:0] wait_time;
    tx1 tx1(.clk(clk), .rst(rst), .send(send), .data(char), .tx(tx), .ed(ed));
    always @(posedge clk)
    begin
        if (!rst)
        begin
            mod3 <= 2'd0;
            mod5 <= 3'd0;
            state <= NEXT;
            dg2 <= 0;
            dg1 <= 0;
            dg0 <= 0;
        end
        else if (state == NEXT)
        begin
            if (dg2 == 1 && dg1 == 0 && dg0 == 0)
            begin
                state <= DONE;
            end
            else
            begin
                if (dg0 != 4'd9)
                begin
                    dg0 <= dg0 + 1'b1;
                end
                else
                begin
                    dg0 <= 4'd0;
                    if (dg1 != 4'd9)
                    begin
                        dg1 <= dg1 + 1'b1;
                    end
                    else
                    begin
                        dg1 <= 4'd0;
                        dg2 <= dg2 + 1'b1;
                    end
                end
                mod3 <= (mod3 == 2) ? 0 : mod3 + 1;
                mod5 <= (mod5 == 4) ? 0 : mod5 + 1;
                state <= 1;
            end
        end
        else if (state == WAIT)
        begin
            wait_time <= wait_time - 1;
            if (wait_time == 63000)
            begin
                send <= 0;      
            end
            if (wait_time == 0)
            begin
                state <= p_state;
            end
        end
        else if (state != DONE)
        begin
            p_state <= state + 1;
            state <= WAIT;
            if (mod3 == 0 && mod5 == 0)
            begin
                case (p_state)
                2:
                    char <= "F";
                3:
                    char <= "I";
                4:
                    char <= "Z";
                5:
                    char <= "Z";
                6:
                    char <= "B";
                7:
                    char <= "U";
                8:
                    char <= "Z";
                9:
                    char <= "Z";
                10:
                begin
                    char <= " ";
                    p_state <= NEXT;
                end
                endcase
            end
            else if (mod3 == 0)
            begin
                case (p_state)
                2:
                    char <= "F";
                3:
                    char <= "I";
                4:
                    char <= "Z";
                5:
                    char <= "Z";
                6:
                begin
                    char <= " ";
                    p_state <= NEXT;
                end
                endcase
            end
            else if (mod5 == 0)
            begin
                case (p_state)
                2:
                    char <= "B";
                3:
                    char <= "U";
                4:
                    char <= "Z";
                5:
                    char <= "Z";
                6:
                begin
                    char <= " ";
                    p_state <= NEXT;
                end
                endcase
            end
            else
            begin
                case (p_state)
                2:
                begin
                    if (dg2 == 0)
                    begin
                        char <= " ";
                    end
                    else
                    begin
                        char <= {4'b0011, dg2[3:0]};
                    end
                end
                3:
                begin
                    if (dg2 == 0 && dg1 == 0)
                    begin
                        char <= " ";
                    end
                    else
                    begin
                        char <= {4'b0011, dg1[3:0]};
                    end
                end
                4:
                begin
                    char <= {4'b0011, dg0[3:0]};
                end
                5:
                begin
                    char <= " ";
                    p_state <= NEXT;
                end
                endcase
            end
            wait_time <= 24'd70000;
            send <= 1;
        end
    end
endmodule

以上。