vistaでquartus その10
概要
vistaでquartusやってみた。
serialに、sendとbusyを導入してみた。
環境
windows vista 32bit
quartus ii v13.0
ep2c5t144ボード
写真
サンプルコード
module test2(input clk, input rst, output tx);
localparam NEXT = 4'b0000;
localparam DONE = 4'b1111;
reg [5:0] n = 0;
reg [7:0] char;
reg [3:0] state = NEXT;
reg send = 0;
tx2 tx2(.clk(clk), .rst(rst), .send(send), .data(char), .tx(tx), .busy(busy));
always @(posedge clk or negedge rst)
begin
if (rst == 0)
begin
state <= NEXT;
n <= 0;
end
else if (send == 1)
begin
send <= 0;
end
else if (state == NEXT)
begin
state <= 1;
end
else if (busy == 0 && state != DONE)
begin
if (n == 26)
begin
state <= DONE;
end
else
begin
char <= 97 + n;
send <= 1;
n <= n + 1;
end
end
end
endmodule
module test2(input clk, input rst, output tx);
localparam NEXT = 4'b0000;
localparam DONE = 4'b1111;
reg [5:0] n = 0;
reg [7:0] char;
reg [3:0] state = NEXT;
reg send = 0;
tx2 tx2(.clk(clk), .rst(rst), .send(send), .data(char), .tx(tx), .busy(busy));
always @(posedge clk or negedge rst)
begin
if (rst == 0)
begin
state <= NEXT;
n <= 0;
end
else if (send == 1)
begin
send <= 0;
end
else if (state == NEXT)
begin
state <= 1;
end
else if (busy == 0 && state != DONE)
begin
if (n == 26)
begin
state <= DONE;
end
else
begin
char <= 97 + n;
send <= 1;
n <= n + 1;
end
end
end
endmodule
以上。
Author And Source
この問題について(vistaでquartus その10), 我々は、より多くの情報をここで見つけました https://qiita.com/ohisama@github/items/4c3e507d5a8c54a05c38著者帰属:元の著者の情報は、元のURLに含まれています。著作権は原作者に属する。
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