module fizz(input clk, input rst, output reg [7:0] out);
    reg [7:0] a;
    reg [7:0] b;
    reg [7:0] pc;
    reg [7:0] mod;
    always @(posedge clk)
    begin
        if (!rst)
        begin
            a <= 0;
            b <= 0;
            pc <= 10;
            mod <= 0;
        end
        else
        begin
            case (pc)
            10:
            begin
                a <= 0;
                pc <= 20;
            end
            20:
            begin
                a <= a + 1;
                pc <= 30;
            end
            30:
            begin
                b <= a / 15;
                mod <= a % 15;
                pc <= 40;
            end
            40:
            begin
                if (mod == 0)
                begin
                    pc <= 120;
                end
                else
                begin
                    pc <= 50;
                end
            end
            50:
            begin
                b <= a / 5;
                mod <= a % 5;
                pc <= 60;
            end
            60:
            begin
                if (mod == 0)
                begin
                    pc <= 140;
                end
                else
                begin
                    pc <= 70;
                end
            end
            70:
            begin
                b <= a / 3;
                mod <= a % 3;
                pc <= 80;
            end
            80:
            begin
                if (mod == 0)
                begin
                    pc <= 160;
                end
                else
                begin
                    pc <= 90;
                end
            end
            90:
            begin
                out <= a / 100 + "0";
                pc <= 91;
            end
            91:
            begin
                out <= a / 10 % 10 + "0";
                pc <= 92;
            end
            92:
            begin
                out <= a % 10 + "0";
                pc <= 100;
            end
            100:
            begin
                if (a < 100)
                begin
                    pc <= 20;
                end
                else
                begin
                    pc <= 110;
                end
            end
            110:
            begin
                pc <= 110;
            end
            120:
            begin
                out <= "F";
                pc <= 121;
            end
            121:
            begin
                out <= "I";
                pc <= 122;
            end
            122:
            begin
                out <= "Z";
                pc <= 123;
            end
            123:
            begin
                out <= "Z";
                pc <= 124;
            end
            124:
            begin
                out <= "B";
                pc <= 125;
            end
            125:
            begin
                out <= "U";
                pc <= 126;
            end
            126:
            begin
                out <= "Z";
                pc <= 127;
            end
            127:
            begin
                out <= "Z";
                pc <= 130;
            end
            130:
            begin
                pc <= 100;
            end
            140:
            begin
                out <= "B";
                pc <= 141;
            end
            141:
            begin
                out <= "U";
                pc <= 142;
            end
            142:
            begin
                out <= "Z";
                pc <= 143;
            end
            143:
            begin
                out <= "Z";
                pc <= 150;
            end
            150:
            begin
                pc <= 100;
            end
            160:
            begin
                out <= "F";
                pc <= 161;
            end
            161:
            begin
                out <= "I";
                pc <= 162;
            end
            162:
            begin
                out <= "Z";
                pc <= 163;
            end
            163:
            begin
                out <= "Z";
                pc <= 170;
            end
            170:
            begin
                pc <= 100;
            end
            endcase
        end
    end
    initial
    begin
        //$monitor("%d", pc);
    end
endmodule

module test;
    reg clk,
        rst;
    wire [7:0] out;
    fizz u(.clk(clk), .rst(rst), .out(out));
    initial
    begin
        clk = 0;
        rst = 1;
        $monitor("%s", out);
        #2
            rst = 0;
        #2
            rst = 1;
        #2500
            $finish;
    end
    always
        #1
            clk = ~clk;
endmodule